ARM: 7955/1: spinlock: ensure we have a compiler barrier before sev
authorWill Deacon <will.deacon@arm.com>
Fri, 7 Feb 2014 18:12:32 +0000 (19:12 +0100)
committerJiri Slaby <jslaby@suse.cz>
Wed, 5 Mar 2014 16:13:40 +0000 (17:13 +0100)
commit103a9391af1e014f6cc1c1e224a4f51bf831768f
treee05111546ba0bc104a49c509e34dc9ab68b7de97
parent160d1d210a8cc5b29722580484f5256882dc275e
ARM: 7955/1: spinlock: ensure we have a compiler barrier before sev

commit 7c8746a9eb287642deaad0e7c2cdf482dce5e4be upstream.

When unlocking a spinlock, we require the following, strictly ordered
sequence of events:

<barrier> /* dmb */
<unlock>
<barrier> /* dsb */
<sev>

Whilst the code does indeed reflect this in terms of the architecture,
the final <barrier> + <sev> have been contracted into a single inline
asm without a "memory" clobber, therefore the compiler is at liberty to
reorder the unlock to the end of the above sequence. In such a case,
a waiting CPU may be woken up before the lock has been unlocked, leading
to extremely poor performance.

This patch reworks the dsb_sev() function to make use of the dsb()
macro and ensure ordering against the unlock.

Reported-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
arch/arm/include/asm/spinlock.h