clk: tegra: Fix wrong value written to PLLE_AUX
authorTuomas Tynkkynen <ttynkkynen@nvidia.com>
Fri, 16 May 2014 13:50:20 +0000 (16:50 +0300)
committerJiri Slaby <jslaby@suse.cz>
Fri, 6 Jun 2014 10:38:18 +0000 (12:38 +0200)
commit1c982327c143125d3fc60763e6d8924b3bb6f028
tree38ed27a26e2eb8a61789d14a6f3f0ab5e9622c49
parent760728fb2347e1de2061f34d8628a145c7c599f0
clk: tegra: Fix wrong value written to PLLE_AUX

commit d2c834abe2b39a2d5a6c38ef44de87c97cbb34b4 upstream.

The value written to PLLE_AUX was incorrect due to a wrong variable
being used. Without this fix SATA does not work.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: improved changelog]
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
drivers/clk/tegra/clk-pll.c