ARM: 6211/1: atomic ops: fix register constraints for atomic64_add_unless
authorWill Deacon <will.deacon@arm.com>
Thu, 8 Jul 2010 09:58:06 +0000 (10:58 +0100)
committerGreg Kroah-Hartman <gregkh@suse.de>
Mon, 2 Aug 2010 17:29:55 +0000 (10:29 -0700)
commit4ed7b05dfcc8cffdc34091b06455fd03f3932a6b
tree0cc414b8c990898b81f841232fb3d925dc81a829
parent62de72363dc42c800c1673f9d128a95829c9804d
ARM: 6211/1: atomic ops: fix register constraints for atomic64_add_unless

commit 068de8d1be48a04b92fd97f76bb7e113b7be82a8 upstream.

The atomic64_add_unless function compares an atomic variable with
a given value and, if they are not equal, adds another given value
to the atomic variable. The function returns zero if the addition
did not occur and non-zero otherwise.

On ARM, the return value is initialised to 1 in C code. Inline assembly
code then performs the atomic64_add_unless operation, setting the
return value to 0 iff the addition does not occur. This means that
when the addition *does* occur, the value of ret must be preserved
across the inline assembly and therefore requires a "+r" constraint
rather than the current one of "=&r".

Thanks to Nicolas Pitre for helping to spot this.

Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
arch/arm/include/asm/atomic.h