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(parent: 19fadc7) | patch
MIPS: SNI: Fix MIPS_L1_CACHE_SHIFT
authorThomas Bogendoerfer <tsbogend@alpha.franken.de>
Mon, 14 Sep 2020 16:05:00 +0000 (18:05 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 23 Sep 2020 06:44:27 +0000 (08:44 +0200)
commit5c56e5fc60b501877437281b84f8ddcf7241e5f2
treec71c40a05533f6258a4beb8d477be994b129ba01tree | snapshot
parent19fadc7cfc8533064c422c7e02a1b3fbf83e31eacommit | diff
MIPS: SNI: Fix MIPS_L1_CACHE_SHIFT

[ Upstream commit 564c836fd945a94b5dd46597d6b7adb464092650 ]

Commit 930beb5ac09a ("MIPS: introduce MIPS_L1_CACHE_SHIFT_<N>") forgot
to select the correct MIPS_L1_CACHE_SHIFT for SNI RM. This breaks non
coherent DMA because of a wrong allocation alignment.

Fixes: 930beb5ac09a ("MIPS: introduce MIPS_L1_CACHE_SHIFT_<N>")
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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wrapfs-4.14.y