mips: fix cacheinfo
authorVladimir Kondratiev <vladimir.kondratiev@linux.intel.com>
Tue, 16 Jul 2019 07:36:56 +0000 (10:36 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 29 Aug 2019 06:28:27 +0000 (08:28 +0200)
commit70b4edd74b6dbd28e12486e5c679c7c128c07b54
treea692ca807b52deba262740819aff45fb87a80dba
parent326175aa28fd29faf7b6554f4f370cae14155aae
mips: fix cacheinfo

[ Upstream commit b8bea8a5e5d942e62203416ab41edecaed4fda02 ]

Because CONFIG_OF defined for MIPS, cacheinfo attempts to fill information
from DT, ignoring data filled by architecture routine. This leads to error
reported

 cacheinfo: Unable to detect cache hierarchy for CPU 0

Way to fix this provided in
commit fac51482577d ("drivers: base: cacheinfo: fix x86 with
 CONFIG_OF enabled")

Utilize same mechanism to report that cacheinfo set by architecture
specific function

Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@linux.intel.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/mips/kernel/cacheinfo.c