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(parent: c51ad0f) | patch
drm/i915: Set SSC frequency for 8xx chips correctly
authorMa Ling <ling.ma@intel.com>
Thu, 25 Jun 2009 02:59:22 +0000 (10:59 +0800)
committerGreg Kroah-Hartman <gregkh@suse.de>
Sun, 16 Aug 2009 21:18:24 +0000 (14:18 -0700)
commit8a42f28cde25721fad467fe0fcff915ba7e073b7
treebc5368467469d7c338bf15f9296709726cb0797ftree | snapshot
parentc51ad0fb7bf823d924cb20e45e601c4ca4aba383commit | diff
drm/i915: Set SSC frequency for 8xx chips correctly

(cherry picked from commit 6ff4fd05676bc5b5c930bef25901e489f7843660)

All 8xx class chips have the 66/48 split, not just 855.

Signed-off-by: Ma Ling <ling.ma@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
drivers/gpu/drm/i915/intel_bios.c diff | blob | history
unionfs2-2.6.39.y