clk: tegra30: Add hda clock default rates to clock driver
authorPeter Geis <pgwipeout@gmail.com>
Fri, 8 Jan 2021 13:59:12 +0000 (13:59 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 27 Jan 2021 10:47:44 +0000 (11:47 +0100)
commit8ab3478335ad8fc08f14ec73251b084fe02b3ebb
tree4e8a5eb76eb652c12d23b83e196359ac6d98626a
parentc074680653e27f19eb584522df06758607277f77
clk: tegra30: Add hda clock default rates to clock driver

[ Upstream commit f4eccc7fea203cfb35205891eced1ab51836f362 ]

Current implementation defaults the hda clocks to clk_m. This causes hda
to run too slow to operate correctly. Fix this by defaulting to pll_p and
setting the frequency to the correct rate.

This matches upstream t124 and downstream t30.

Acked-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Ion Agorria <ion@agorria.com>
Acked-by: Sameer Pujar <spujar@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210108135913.2421585-2-pgwipeout@gmail.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/clk/tegra/clk-tegra30.c