ARM: pxa: irq: fix handling of ICMR registers in suspend/resume
authorDaniel Mack <daniel@zonque.org>
Fri, 6 Jul 2018 20:15:00 +0000 (22:15 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 24 Aug 2018 11:07:01 +0000 (13:07 +0200)
commit966829aba26675583f0402463ec0eec4c7fb68ee
treef7466fc34b6882e7f044b1e7e003b3889da62fe9
parenta583ba7a4a196d437723d634ac4be8fab023cb88
ARM: pxa: irq: fix handling of ICMR registers in suspend/resume

[ Upstream commit 0c1049dcb4ceec640d8bd797335bcbebdcab44d2 ]

PXA3xx platforms have 56 interrupts that are stored in two ICMR
registers. The code in pxa_irq_suspend() and pxa_irq_resume() however
does a simple division by 32 which only leads to one register being
saved at suspend and restored at resume time. The NAND interrupt
setting, for instance, is lost.

Fix this by using DIV_ROUND_UP() instead.

Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm/mach-pxa/irq.c