drm/amd/display: Fix incorrect backlight register offset for DCN
authorDavid Galiffi <David.Galiffi@amd.com>
Thu, 3 Sep 2020 23:20:36 +0000 (19:20 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 5 Nov 2020 10:51:48 +0000 (11:51 +0100)
commitaa7c61b31680c93e86988ef23e266ab4d652827e
tree01e15cef1d5b8a5ec70c3b154e6455acde525000
parentb8b9194fc802eaaef736cba5f08276fd2883ec79
drm/amd/display: Fix incorrect backlight register offset for DCN

commit 651111be24aa4c8b62c10f6fff51d9ad82411249 upstream.

[Why]
Typo in backlight refactor introduced wrong register offset.

[How]
SR(BIOS_SCRATCH_2) to NBIO_SR(BIOS_SCRATCH_2).

Signed-off-by: David Galiffi <David.Galiffi@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h