net: phy: bcm7xxx: define soft_reset for 40nm EPHY
authorDoug Berger <opendmb@gmail.com>
Wed, 16 Oct 2019 23:06:30 +0000 (16:06 -0700)
committerBen Hutchings <ben@decadent.org.uk>
Thu, 19 Dec 2019 15:58:37 +0000 (15:58 +0000)
commit fe586b823372a9f43f90e2c6aa0573992ce7ccb7 upstream.

The internal 40nm EPHYs use a "Workaround for putting the PHY in
IDDQ mode." These PHYs require a soft reset to restore functionality
after they are powered back up.

This commit defines the soft_reset function to use genphy_soft_reset
during phy_init_hw to accommodate this.

Fixes: 6e2d85ec0559 ("net: phy: Stop with excessive soft reset")
Signed-off-by: Doug Berger <opendmb@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
[bwh: Backported to 3.16:
 - Delete trailing backslash; there is a single entry for 40 nm PHYs
   and not a macro definition
 - Adjust context]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
drivers/net/phy/bcm7xxx.c

index 51678e3937930dc99d7b561c48674eeda6143b4d..60dcb51bd560326f4850cca5fa0049147a0f2025 100644 (file)
@@ -306,6 +306,7 @@ static struct phy_driver bcm7xxx_driver[] = {
        .features       = PHY_GBIT_FEATURES |
                          SUPPORTED_Pause | SUPPORTED_Asym_Pause,
        .flags          = PHY_IS_INTERNAL,
+       .soft_reset     = genphy_soft_reset,
        .config_init    = bcm7xxx_config_init,
        .config_aneg    = genphy_config_aneg,
        .read_status    = genphy_read_status,