libata: Align ata_device's id on a cacheline
authorHarvey Hunt <harvey.hunt@imgtec.com>
Wed, 24 Feb 2016 15:16:43 +0000 (15:16 +0000)
committerSasha Levin <sasha.levin@oracle.com>
Fri, 11 Mar 2016 14:45:21 +0000 (09:45 -0500)
[ Upstream commit 4ee34ea3a12396f35b26d90a094c75db95080baa ]

The id buffer in ata_device is a DMA target, but it isn't explicitly
cacheline aligned. Due to this, adjacent fields can be overwritten with
stale data from memory on non coherent architectures. As a result, the
kernel is sometimes unable to communicate with an ATA device.

Fix this by ensuring that the id buffer is cacheline aligned.

This issue is similar to that fixed by Commit 84bda12af31f
("libata: align ap->sector_buf").

Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Cc: <stable@vger.kernel.org> # 2.6.18
Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Sasha Levin <sasha.levin@oracle.com>
include/linux/libata.h

index a60e04bcda0f08b43715ff56f3123936dc1228cd..d69ce28efab105836a3b0a95b18fa1054d591102 100644 (file)
@@ -715,7 +715,7 @@ struct ata_device {
        union {
                u16             id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
                u32             gscr[SATA_PMP_GSCR_DWORDS]; /* PMP GSCR block */
-       };
+       } ____cacheline_aligned;
 
        /* DEVSLP Timing Variables from Identify Device Data Log */
        u8                      devslp_timing[ATA_LOG_DEVSLP_SIZE];