ARM: dts: dra7-l4: mark timer13-16 as pwm capable

[ Upstream commit 00a39c92c8ab94727f021297d1748531af113fcd ]

DMTimers 13 - 16 are PWM capable and also can be used for CPTS input
signals generation. Hence, mark them as "ti,timer-pwm".

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi
index c3954e34835b809e0e7f601da2313f048fbc3400..3ae4f6358da414dbc158375c0a008b9c1b569028 100644 (file)
--- a/arch/arm/boot/dts/dra7-l4.dtsi
+++ b/arch/arm/boot/dts/dra7-l4.dtsi
@@ -3413,6 +3413,7 @@
                                clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER13_CLKCTRL 24>;
                                clock-names = "fck";
                                interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>;
+                               ti,timer-pwm;
                        };
                };
 
@@ -3441,6 +3442,7 @@
                                clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER14_CLKCTRL 24>;
                                clock-names = "fck";
                                interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
+                               ti,timer-pwm;
                        };
                };
 
@@ -3469,6 +3471,7 @@
                                clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>;
                                clock-names = "fck";
                                interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
+                               ti,timer-pwm;
                        };
                };
 
@@ -3497,6 +3500,7 @@
                                clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>;
                                clock-names = "fck";
                                interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
+                               ti,timer-pwm;
                        };
                };