* start and end are in units of 4k bytes
* ram registers are in units of 64bit words
*/
-static void sky2_ramset(struct sky2_hw *hw, u16 q, u8 startk, u8 endk)
+static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space)
{
- u32 start, end;
+ u32 end;
- start = startk * 4096/8;
- end = (endk * 4096/8) - 1;
+ start *= 1024/8;
+ space *= 1024/8;
+ end = start + space - 1;
sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
sky2_write32(hw, RB_ADDR(q, RB_START), start);
sky2_write32(hw, RB_ADDR(q, RB_RP), start);
if (q == Q_R1 || q == Q_R2) {
- u32 space = (endk - startk) * 4096/8;
u32 tp = space - space/4;
/* On receive queue's set the thresholds
sky2_mac_init(hw, port);
- /* Determine available ram buffer space (in 4K blocks).
- * Note: not sure about the FE setting below yet
- */
- if (hw->chip_id == CHIP_ID_YUKON_FE)
- ramsize = 4;
- else
- ramsize = sky2_read8(hw, B2_E_0);
-
- /* Give transmitter one third (rounded up) */
- rxspace = ramsize - (ramsize + 2) / 3;
+ /* Determine available ram buffer space (in 4K blocks). */
+ ramsize = sky2_read8(hw, B2_E_0) * 4;
+ if (ramsize != 0) {
+ if (ramsize < 16)
+ rxspace = ramsize / 2;
+ else
+ rxspace = 8 + (2*(ramsize - 16))/3;
- sky2_ramset(hw, rxqaddr[port], 0, rxspace);
- sky2_ramset(hw, txqaddr[port], rxspace, ramsize);
+ sky2_ramset(hw, rxqaddr[port], 0, rxspace);
+ sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace);
- /* Make sure SyncQ is disabled */
- sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
- RB_RST_SET);
+ /* Make sure SyncQ is disabled */
+ sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
+ RB_RST_SET);
+ }
sky2_qset(hw, txqaddr[port]);