drm/radeon/dpm: make sure dc performance level limits are valid (BTC-SI) (v2)
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 30 Aug 2013 20:18:35 +0000 (16:18 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 1 Oct 2013 16:41:01 +0000 (09:41 -0700)
commit 1ff60ddb84bb9ff6fa182710c4e08b66badf918c upstream.

Check to make sure the dc limits are valid before using them.
Some systems may not have a dc limits table.  In that case just
use the ac limits.  This fixes hangs on systems when the power
state is changed when on battery (dc) due to invalid performance
state parameters.

Should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=68708

v2: fix up limits in dpm_init()

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/radeon/btc_dpm.c
drivers/gpu/drm/radeon/ni_dpm.c
drivers/gpu/drm/radeon/si_dpm.c

index 9953e1fbc46d74e53adf50eab2eb05e602287f54..084e69414fd15405d03417b0e73ab8e8f1488c58 100644 (file)
@@ -2699,6 +2699,12 @@ int btc_dpm_init(struct radeon_device *rdev)
        else
                rdev->pm.dpm.dyn_state.sclk_mclk_delta = 10000;
 
+       /* make sure dc limits are valid */
+       if ((rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) ||
+           (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0))
+               rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc =
+                       rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
+
        return 0;
 }
 
index f0f5f748938ad6c30292d2b109bef4c3a2f8fc29..56d0d95afd60645a422ead11b72ffc5bd445acef 100644 (file)
@@ -4270,6 +4270,12 @@ int ni_dpm_init(struct radeon_device *rdev)
 
        ni_pi->use_power_boost_limit = true;
 
+       /* make sure dc limits are valid */
+       if ((rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) ||
+           (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0))
+               rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc =
+                       rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
+
        return 0;
 }
 
index 88699e3cd868047555ce426ecb2251c7f9f3850e..1cfba39dbd66fdea370b1777f57ec7fcef967f26 100644 (file)
@@ -6401,6 +6401,12 @@ int si_dpm_init(struct radeon_device *rdev)
 
        si_initialize_powertune_defaults(rdev);
 
+       /* make sure dc limits are valid */
+       if ((rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) ||
+           (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0))
+               rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc =
+                       rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
+
        return 0;
 }