perf/x86/amd/ibs: Don't include randomized bits in get_ibs_op_count()
authorKim Phillips <kim.phillips@amd.com>
Tue, 8 Sep 2020 21:47:37 +0000 (16:47 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 10 Nov 2020 09:23:55 +0000 (10:23 +0100)
commit 680d69635005ba0e58fe3f4c52fc162b8fc743b0 upstream.

get_ibs_op_count() adds hardware's current count (IbsOpCurCnt) bits
to its count regardless of hardware's valid status.

According to the PPR for AMD Family 17h Model 31h B0 55803 Rev 0.54,
if the counter rolls over, valid status is set, and the lower 7 bits
of IbsOpCurCnt are randomized by hardware.

Don't include those bits in the driver's event count.

Fixes: 8b1e13638d46 ("perf/x86-ibs: Fix usage of IBS op current count")
Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@vger.kernel.org
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/x86/events/amd/ibs.c

index 99aba3c964cbbce75fc522926f717c723551d504..39cb10ec596ea290b3407a849022c600570c3e4f 100644 (file)
@@ -346,11 +346,15 @@ static u64 get_ibs_op_count(u64 config)
 {
        u64 count = 0;
 
+       /*
+        * If the internal 27-bit counter rolled over, the count is MaxCnt
+        * and the lower 7 bits of CurCnt are randomized.
+        * Otherwise CurCnt has the full 27-bit current counter value.
+        */
        if (config & IBS_OP_VAL)
-               count += (config & IBS_OP_MAX_CNT) << 4; /* cnt rolled over */
-
-       if (ibs_caps & IBS_CAPS_RDWROPCNT)
-               count += (config & IBS_OP_CUR_CNT) >> 32;
+               count = (config & IBS_OP_MAX_CNT) << 4;
+       else if (ibs_caps & IBS_CAPS_RDWROPCNT)
+               count = (config & IBS_OP_CUR_CNT) >> 32;
 
        return count;
 }