perf/x86/kvm: Add Cascade Lake Xeon steppings to isolation_ucodes[]
authorJim Mattson <jmattson@google.com>
Fri, 5 Feb 2021 19:13:24 +0000 (11:13 -0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 7 Mar 2021 11:20:47 +0000 (12:20 +0100)
[ Upstream commit b3c3361fe325074d4144c29d46daae4fc5a268d5 ]

Cascade Lake Xeon parts have the same model number as Skylake Xeon
parts, so they are tagged with the intel_pebs_isolation
quirk. However, as with Skylake Xeon H0 stepping parts, the PEBS
isolation issue is fixed in all microcode versions.

Add the Cascade Lake Xeon steppings (5, 6, and 7) to the
isolation_ucodes[] table so that these parts benefit from Andi's
optimization in commit 9b545c04abd4f ("perf/x86/kvm: Avoid unnecessary
work in guest filtering").

Signed-off-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lkml.kernel.org/r/20210205191324.2889006-1-jmattson@google.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/x86/events/intel/core.c

index b24c38090dd9943a2d05a7302b26d538d24b4394..90760393a9643a7b8d14a957810beb637e82c872 100644 (file)
@@ -4002,6 +4002,9 @@ static const struct x86_cpu_desc isolation_ucodes[] = {
        INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_X,           2, 0x0b000014),
        INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X,             3, 0x00000021),
        INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X,             4, 0x00000000),
+       INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X,             5, 0x00000000),
+       INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X,             6, 0x00000000),
+       INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X,             7, 0x00000000),
        INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_L,             3, 0x0000007c),
        INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE,               3, 0x0000007c),
        INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE,              9, 0x0000004e),