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iommu/amd: Workaround for ERBT1312
authorJoerg Roedel <joro@8bytes.org>
Thu, 18 Apr 2013 15:55:04 +0000 (17:55 +0200)
committerJoerg Roedel <joro@8bytes.org>
Fri, 19 Apr 2013 18:53:26 +0000 (20:53 +0200)
commitd3263bc29706e42f74d8800807c2dedf320d77f1
tree7a1208b29e81c620265899b2b9a940e5a7328ed9tree | snapshot
parent7d8bfa26f236bc9528415402dda6b498a0682e42commit | diff
iommu/amd: Workaround for ERBT1312

Work around an IOMMU  hardware bug where clearing the
EVT_INT or PPR_INT bit in the status register may race with
the hardware trying to set it again. When not handled the
bit might not be cleared and we lose all future event or ppr
interrupts.

Reported-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Joerg Roedel <joro@8bytes.org>
drivers/iommu/amd_iommu.c diff | blob | history
unionfs2-2.6.39.y